Contest Submission Deadline Extended


Hey everyone!

Good news! We have received confirmation from the Xilinx team for a full month-long deadline extension! For those who just received your Ultra96 boards, please get started on your project. Those who have already been working on it, please use this time to perfect your projects! The new submission deadline is November 9th.

We know the Ultra96 is no regular development board & may prove to be difficult than most of the boards we give away for contests. I will be sending along an email to all participants with more resources on how to get started.

But either way, please take advantage of this lengthy deadline extension. Thanks and enjoy the weekend.



Dear Sir, I have received no board (if I remember correctly my
project was not chosen) , so may I ask why am I receiving this
e-mail ? Something goes wrong in communications between us ?

Thank you .


Hi Judges,

I’m guessing the extension is due to the lack of submitted projects, but I see that one of the 3 submission criteria is:

  • Your project must be 100% complete. Do not submit your project if it is still a work in progress.

The only submitted project so far is ‘Stereo Vision and LiDAR Powered Donkey Car’, which is marked as a ‘work in progress’…

I wasn’t planning on submitting until the last day (or hour) because of this clause, because I only get one chance to submit so I many as well use as much time as possible before deciding my project is ‘complete’ (btw, is any hobby project ever really complete?). If this rule was removed, I think you would see more projects listed.


Hi Ella:

Thanks for the heads up. One item that would benefit from some clarity is the Petalinux setup. The requirements listed in the docs (disk >150GB) are ridiculous, so it would be good to know what are more reasonable requirements for the Petalinux bring up.


Oh, and another unexpected constraint: the Xilinx tool chain doesn’t support VHDL 2008! That was a total shocker and added a lot of rework to our engineering effort. So folks be forewarned that you can’t use any of the productivity features of VHDL 2008 on your Xilinx designs and have to fall back to 20 year old approaches. I still can’t believe that the Xilinx tools are so limited.


Hi Theodore,
I’m no expert, but I think you can turn on VHDL 2008 in a setting somewhere for individual files. I’ve used it in the past, and as I recall, it can work sometimes, but sometimes simulation doesnt work…


@dnhkng thanks for the reply. What is a more accurate statement is that the Xilinx tool chain doesn’t support the ‘full’ VHDL2008 specification. In particular, the parts in the spec that deal with generics of packages, which is a powerful mechanism to create generalized data paths, which would be so effective for FPGA designs. Also, simulation support of the console is completely lacking, so when you have large validation/regression suites to make certain your design is correct, you can’t use the Xilinx tool chain to run them. That causes a lot of extra rework as you can’t properly test your design before going into synthesis and bitstream generation.

So, all the productivity component of the VHDL 2008 specification that came out of the best practices, the Xilinx tool chain fails to support, thus making it a very unproductive environment for hw development.